<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>X86 on Jasper</title><link>https://jasper-aa64.github.io/zh/tags/x86/</link><description>Recent content in X86 on Jasper</description><generator>Hugo</generator><language>zh-CN</language><lastBuildDate>Tue, 15 Sep 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://jasper-aa64.github.io/zh/tags/x86/index.xml" rel="self" type="application/rss+xml"/><item><title>交易系统笔记 #2：内存序与缓存行</title><link>https://jasper-aa64.github.io/zh/posts/memory-ordering-false-sharing-dependency-chains/</link><pubDate>Tue, 15 Sep 2026 00:00:00 +0000</pubDate><guid>https://jasper-aa64.github.io/zh/posts/memory-ordering-false-sharing-dependency-chains/</guid><description>同一套缓存硬件带出两个不相干的问题。正确性：写先进 store buffer，别的核要过一段时间才看得见，靠 release/acquire 配对补上顺序。性能：就算每个值都读对了，两个核抢同一条缓存行（伪共享）照样慢，靠缓存行布局解决。</description></item></channel></rss>