https://jasper-aa64.github.io/tags/numa/Recent content in Numa on JasperHugoen-usSun, 04 Oct 2026 00:00:00 +0000https://jasper-aa64.github.io/posts/alignment-layout-cache-dram-geometry/Sun, 04 Oct 2026 00:00:00 +0000https://jasper-aa64.github.io/posts/alignment-layout-cache-dram-geometry/An access never pays for bytes; it pays for cache lines, and the address decides which lines, which cache set they compete for, and which DRAM channel and bank they live on. Part 1 is alignment: why a double aligned to 8 never straddles a line, why padding exists for arrays, alignas on a type versus a member, and how to get 64-byte and 2 MiB alignment on the heap. Part 2 is layout: lines per access, AoS versus SoA, and denormalization as a way to cut a dependency chain. Part 3 goes into the hardware: L1 picks a set from address bits 6–11, so data 4 KiB apart competes for 8 slots however empty the cache is (measured on an M1); a DRAM bank has one row buffer, 14 ns on a hit and 41 ns on a conflict; a column walk loses at five layers; refresh adds a P99 tail software can’t remove; and channels balance only when the hot stride is coprime with the channel count.https://jasper-aa64.github.io/posts/cpu-affinity-core-isolation-numa/Wed, 09 Sep 2026 00:00:00 +0000https://jasper-aa64.github.io/posts/cpu-affinity-core-isolation-numa/The enemy of a low-latency system is jitter, not the mean. The goal is to make your hot thread the only thing that will ever run on its core: pinning kills migration cost, the isolation stack evicts the tick / RCU / interrupts one layer at a time, disabling SMT and locking frequency removes the core’s own variability, and share-nothing sidesteps NUMA entirely.