#Mesi

4 posts

Low-Latency Systems Development #16 October 21, 2026 35 min read

Spinlocks

Whether a spinlock is fast depends on what its waiters do: if every attempt is a read-modify-write, they drag the lock’s line back and forth. Read before you grab, put PAUSE in the loop, back off after losing, and waiting costs …

#cpp #spinlock #atomics #futex #mesi

Low-Latency Systems Development Topic October 20, 2026 22 min read

A Cache Case Study: Repricing 64 Options per Tick

One tick touches 140 cache lines, and most of the time goes into waiting for them. None of the four steps changes the computation; they change when data arrives, where it lands and who holds it: put the misses in flight together, …

#cpp #cache #mlp #prefetch #clflushopt

Low-Latency Systems Development Topic October 4, 2026 14 min read

MESI Cache Coherence

MESI enforces one rule: a cache line has either one core that may write it or any number of cores that may only read it, never both. The four states are the answers to two questions — does anyone else hold this line, and have I …

#cpp #mesi #cache-coherence #false-sharing #atomics

Low-Latency Systems Development #2 September 15, 2026 25 min read

Memory Ordering and Cache Lines

The store buffer and the cache-coherence protocol are one piece of hardware, but they create two unrelated engineering problems. One is correctness: does a thread see the right value, in the right order — solved by memory_order …

#cpp #memory-model #atomics #cache-coherence #false-sharing