#Cache

2 posts

Low-Latency Systems Development Topic October 20, 2026 22 min read

A Cache Case Study: Repricing 64 Options per Tick

One tick touches 140 cache lines, and most of the time goes into waiting for them. None of the four steps changes the computation; they change when data arrives, where it lands and who holds it: put the misses in flight together, …

#cpp #cache #mlp #prefetch #clflushopt

Low-Latency Systems Development #6 October 4, 2026 41 min read

Alignment, Layout, and Cache and DRAM Geometry

An access never pays for bytes; it pays for cache lines, and the address decides which lines, which cache set they compete for, and which DRAM channel and bank they live on. Part 1 is alignment: why a double aligned to 8 never …

#cpp #alignment #cache #memory-layout #false-sharing