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#Atomics

6 posts

Low-Latency Systems Development #17 14 min read

Wait-Free

Wait-free is not a faster lock-free: it turns a failed CAS from “try again” into “I come after you”, which bounds every thread’s steps, at the cost of more atomics and code that is harder to get right.

Low-Latency Systems Development #16 35 min read

Spinlocks

Whether a spinlock is fast depends on what its waiters do: if every attempt is a read-modify-write, they drag the lock’s line back and forth. Read before you grab, put PAUSE in the loop, back off after losing, and waiting costs …

Low-Latency Systems Development Topic 14 min read

MESI Cache Coherence

MESI enforces one rule: a cache line has either one core that may write it or any number of cores that may only read it, never both. The four states are the answers to two questions — does anyone else hold this line, and have I …

Low-Latency Systems Development #5 22 min read

An SPMC Broadcast Ring in Shared Memory

Market data has one producer and several consumers, each of which must see every message, and the producer is the hot path that may not wait for anyone. The answer is a broadcast ring: every slot carries its own sequence stamp, …

Low-Latency Systems Development #4 24 min read

Lock-Free Queues and Micro-Batching

A lock-free SPSC queue works because every shared variable has exactly one writer: each side updates only its own counter and merely reads the other’s. The rest is keeping that property from being quietly undone — a shared element …

Low-Latency Systems Development #2 25 min read

Memory Ordering and Cache Lines

The store buffer and the cache-coherence protocol are one piece of hardware, but they create two unrelated engineering problems. One is correctness: does a thread see the right value, in the right order — solved by memory_order …